Experienced UVM Verification Engineer

About the role

TMC Electronics is looking for an experienced verification engineer with a strong background in UVM methodology and SystemVerilog. The role involves leading verification activities for FPGA and ASIC projects across semiconductor, medical, automotive and consumer‑electronics domains, while also mentoring junior team members.

Key responsibilities

• Design, develop and maintain advanced UVM‑based test benches.
• Perform code‑coverage analysis and drive verification automation.
• Lead verification efforts on FPGA and ASIC designs, ensuring quality and schedule compliance.
• Collaborate with cross‑functional teams to troubleshoot and resolve issues.
• Mentor junior engineers and contribute to the technical strategy of the verification group.

Required profile

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering or a related discipline.
• 10+ years of hands‑on experience in FPGA or ASIC design and verification.
• Proven expertise in UVM methodology and SystemVerilog coding.
• Strong analytical and problem‑solving skills.
• Experience leading verification projects and coaching junior staff.

Required skills

• UVM methodology
• SystemVerilog
• FPGA design and verification
• ASIC verification
• Test‑bench development
• Code‑coverage analysis
• Verification automation

What we offer

• A collaborative environment within a team of over 100 electronics professionals.
• Projects that match your expertise and ambition.
• Opportunities to lead, mentor and shape the future of FPGA verification.
• A supportive culture that encourages continuous learning.